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guru/sci-electronics/verilator/metadata.xml
Huang Rui f013fe6428 sci-electronics/verilator: enable py3.14
Signed-off-by: Huang Rui <vowstar@gmail.com>
2025-12-11 14:01:51 +08:00

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<?xml version="1.0" encoding="UTF-8"?>
<!DOCTYPE pkgmetadata SYSTEM "https://www.gentoo.org/dtd/metadata.dtd">
<pkgmetadata>
<maintainer type="person">
<email>vowstar@gmail.com</email>
<name>Huang Rui</name>
</maintainer>
<upstream>
<remote-id type="github">verilator/verilator</remote-id>
</upstream>
<longdescription lang="en">
Verilator, the fastest Verilog/SystemVerilog simulator. Accepts Verilog
or SystemVerilog. Performs lint code-quality checks. Compiles into
multithreaded C++, or SystemC. Creates XML to front-end your own tools.
</longdescription>
<longdescription lang="zh">
Verilator最快的 Verilog/SystemVerilog 模拟器。支持 Verilog 和
SystemVerilog。执行 lint 代码质量检查。可编译为多线程 C++ 或
SystemC。生成 XML 以对接您自己的工具。
</longdescription>
</pkgmetadata>