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30 lines
1.3 KiB
XML
30 lines
1.3 KiB
XML
<?xml version="1.0" encoding="UTF-8"?>
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<!DOCTYPE pkgmetadata SYSTEM "https://www.gentoo.org/dtd/metadata.dtd">
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<pkgmetadata>
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<maintainer type="person">
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<email>vowstar@gmail.com</email>
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<name>Huang Rui</name>
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</maintainer>
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<longdescription lang="en">
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SymbiYosys (sby) is a front-end driver program for Yosys-based formal
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hardware verification flows. It supports bounded model checking (BMC),
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unbounded model checking, and cover property checking for hardware
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designs written in Verilog, SystemVerilog, or VHDL. SymbiYosys
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integrates with various SMT solvers and model checkers including
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Yices, Z3, Boolector, and ABC.
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</longdescription>
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<longdescription lang="zh">
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SymbiYosys (sby) 是基于 Yosys 的形式化硬件验证流程的前端驱动程序。
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它支持有界模型检查 (BMC)、无界模型检查和覆盖属性检查，适用于使用
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Verilog、SystemVerilog 或 VHDL 编写的硬件设计。SymbiYosys 集成了
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多种 SMT 求解器和模型检查器，包括 Yices、Z3、Boolector 和 ABC。
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</longdescription>
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<use>
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<flag name="yices2">Enable Yices2 SMT solver support</flag>
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</use>
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<upstream>
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<remote-id type="github">YosysHQ/sby</remote-id>
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<bugs-to>https://github.com/YosysHQ/sby/issues</bugs-to>
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</upstream>
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</pkgmetadata>
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